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- Subject
- Field Effect Transistors - FETelectrical-engineering-mcqs › field-effect-transistors-fet
- Published
- 22 Dec 2018
- Last updated
- 28 May 2026
Explanation
In a common-source JFET amplifier, the output voltage is inverted relative to the input, resulting in a 180-degree phase shift. This means the output is exactly out of phase with the input signal. Options B and C describe incorrect phase relationships, and option D incorrectly states the output terminal.
More Field Effect Transistors - FET MCQs
Practice related questions from the same subject.
- 1.Which JFET configuration corresponds to the common base setup in a PNP transistor?
- 2.In a JFET, what does the term IDSS represent?
- 3.For a common-source JFET amplifier with RD = 1 kΩ, RS = 560 Ω, VDD = 10 V, and transconductance gm = 4500 µS, what is the voltage gain if the source resistor is fully bypassed?
- 4.For a p-channel enhancement-mode MOSFET with a threshold voltage (V_GS(th)) of -2V, what is the drain current when the gate-to-source voltage (V_GS) is 0V?
- 5.A D-MOSFET has a gate-to-source voltage (VGS) of 0 V. Given that the datasheet lists IDSS as 20 mA and VGS(off) as -5 V, what is the expected drain current (ID)?
- 6.What happens to the JFET channel when it reaches the cut-off condition?
- 7.If a JFET datasheet specifies the cutoff gate-source voltage (VGS(off)) as -4 V, what is the value of the pinch-off voltage (Vp)?
- 8.In a JFET, the source terminal is analogous to which part of a vacuum tube?
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